| cvkbdcpld Project Status (09/20/2013 - 11:45:58) | |||
| Project File: | cvkbdcpld.xise | Parser Errors: | No Errors |
| Module Name: | cvkbdcpld | Implementation State: | Fitted |
| Target Device: | xc9572xl-10PC44 |
|
No Errors |
| Product Version: | ISE 14.1 |
|
No Warnings |
| Design Goal: | Balanced |
|
|
| Design Strategy: | Xilinx Default (unlocked) |
|
|
| Environment: | System Settings |
|
|
| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | Current | Fri Sep 20 11:45:49 2013 | 0 | 0 | 0 | |
| Translation Report | Current | Fri Sep 20 11:45:58 2013 | 0 | 0 | 0 | |
| CPLD Fitter Report (Text) | Current | Fri Sep 20 11:46:02 2013 | 0 | 2 Warnings (1 new) | 1 Info (1 new) | |
| Power Report | ||||||
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |
| Post-Fit Simulation Model Report | |||